description package schematic symbol features absolute maximum ratings symbol value units peak off-state voltage v drm 1400 v peak reverse voltage v rrm -5 v off-state rate of change of voltage immunity dv/ dt 5000 v/usec continuous anode current at 110 o c i a110 65 a repetitive peak anode current (pulse width=1usec) i asm 6000 a rate of change of current di/ dt 125 ka/usec continuous gate-cathode voltage v gks +/-20 v peak gate-cathode voltage v gkm +/-25 v minimum negative gate-cathode voltage required for garanteed off-state v gk(off-min) -5 v maximum junction temperature t jm 150 o c maximum soldering temperature (installation) 260 o c this silicon power product is protected by one or more of the following u.s. patents: 5,446,316 5,557,656 5,564,226 5,517,058 4,814,283 5,135,890 5,521,436 5,585,310 5,248,901 5,366,932 5,497,013 5,532,635 5,105,536 5,777,346 5,446,316 5,577,656 5,473,193 5,166,773 5,209,390 5,139,972 5,103,290 5,028,987 5,304,847 5,569,957 4,958,211 5,111,268 5,260,590 5,350,935 5,640,300 5,184,206 5,206,186 5,757,036 5,777,346 5,995,349 4,801,985 4,476,671 4,857,983 4,888,627 4,912,541 5,424,563 5,399,892 5,468,668 5,082,795 4,980,741 4,941,026 4,927,772 4,739,387 4,648,174 4,644,637 4,374,389 4,750,666 4,429,011 5,293,070 this voltage controlled solidtron (vcs) discharge switch utilizes an n-type mos-controlled thyristor mounted in a five leaded to- 247 plastic package. the vcs features the high peak current capability and low on- state voltage drop common to scr thyristors combined with extremely high di/dt capability. this semiconductor is intended for the control of high power circuits with the use of very small amounts of input energy and is ideally suited for capacitor discharge applications. the industry standard to-247 package allows for assembly of the solidtron using automated insertion equipment. l 1400v peak off-state voltage l 65a continuous rating l 6ka surge current capability l >100ka/usec di/dt capability l <150nsec turn-on delay l low on-state voltage l mos gated control l low inductance package anode (a) gate (g) cathode (k) gate return (gr) 5 lead to-247 advanced pulse power device n- mos vcs, to-247 smct aa65n14a10 1
performance characteristics t j =25 o c unless otherwise specified measurements parameters symbol test conditions min. typ. max. units anode to cathode breakdown voltage v (br) v gk =-5, i a =1ma 1400 v anode-cathode off-state current i d v ge =-5v, v ak =1200v t c =25 o c <10 100 ua t c =150 o c 250 1000 ua gate-cathode turn-on threshold voltage v gk(th) v ak =v gk , i ak =1ma 0.7 v gate-cathode leakage current i gk(lkg) v gk =+/-20v 750 na anode-cathode on-state voltage v t i t =65a, v gk =+5v t c =25 o c 1.3 1.8 v (see figures 1,2 & 3) t c =150 o c 1.1 1.4 v input capacitance c iss 18 nf turn-on delay time t d(on) 0.2uf capacitor discharge 82 150 ns rate of change of current di/ dt t j =25 o c, v gk = -5v to +5v 58 ka/usec peak anode current i p v ak =800v, rg=4.7 w 3300 a discharge event energy e dis l s = 8nh (see figures 4,5 & 6) 36 mj turn-on delay time t d(on) 0.2uf capacitor discharge 64 120 ns rate of change of current di/ dt t j =150 o c, v gk = -5v to +5v 100 ka/usec peak anode current i p v ak =1200v, rg=4.7 w 5200 a discharge event energy e dis l s = 8nh (see figures 4,5 & 6) 74 mj junction to case thermal resistance r q jc anode (bottom) side cooled (note 1.) 0.035 o c/w typical performance curves (unless otherwise specified) typical performance curves figure 1. on-state characteristics figure 2. on-state characteristics figure 3. predicted high current on-state characteristics 0 50 100 150 200 250 300 350 0.0 0.5 1.0 1.5 2.0 2.5 v t - on-state voltage=volts i t - on-state current-a v gk =+5v pulse duration = 250usec. duty cycle=<0.5% t j =25 o c t j =150 o c 0 10 20 30 40 50 60 70 80 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 v t - on-state voltage=volts i t - on-state current-a v gk =+5v pulse duration = 250usec. duty cycle=<0.5% t j =25 o c t j =150 o c 0 1000 2000 3000 4000 5000 6000 0 4 8 12 16 20 24 v t - on-state voltage - v i t - on-state current-a t j =25 o c r on = 3.5m w t j =150 o c r on = 3.9m w advanced pulse power device n- mos vcs, to-247 smct aa65n14a10
typical performance curves (continued) figure 4. turn-on delay characteristics figure 5. turn-on delay characteristics r g =4.7 w - 500 w , t j =25 o c r g =4.7 w & 50 w , t j =25 o c & 150 o c figure 6. 0.2uf discharge pulse performance characteristics (see figure 9.) 0 200 400 600 800 1000 1200 200 400 600 800 1000 1200 1400 v cc - collector (anode) supply voltage-volts t d(on) - turn-on delay-nsec r g =500 w r g = 100 w r g = 50 w r g = 4.7 w t j =25 o c c=0.2uf l s =8nh see figure 9. for test circuit 0 50 100 150 200 250 800 900 1000 1100 1200 1300 1400 v cc - collector (anode) supply voltage-v t d(on) - turn-on delay-nsec r g =4.7 w t j =150 o c t j =25 o c see figure 9. for test circuit c=0.2uf l s =8nh r g =50 w t j =150 o c t j =25 o c 0 10 20 30 40 50 60 70 80 90 100 200 400 600 800 1000 1200 1400 v cc - collector (anode) supply voltage - v e dis - discharge event energy - mj l s =12nh l s =25nh l s =50nh l s =100nh t j =25 o c c =0.2uf r g =4.7 w i p =4ka i p =3ka i p =2ka i p =5ka advanced pulse power device n- mos vcs, to-247 smct aa65n14a10
test circuit and waveforms figure 9. 0.2uf pulsed discharge circuit schematic figure 10. 0.2uf pulsed discharge circuit waveforms v gk v ak i a i p t d(on) 0 ref. 0 ref. 90% 10% di/dt - 10% to 50% of i a l the waveform shown is representative of one produced using a very low inductance circuit (<10nh). l v gk is held positive until i a oscillations have ended ( i a =0). supply voltage l series (total) dut r sense = 0.010 w c=0.2uf + - r g gate driver +5v -5v l l series(total) is caculated using 1 / (f 2 p ) 2 c where f = frequency of i a (see figure 10) l r sense is a calibrated current viewing resistor (cvr) advanced pulse power device n- mos vcs, to-247 smct aa65n14a10
application notes packaging and handling a1. use of gate return the vcs was designed for high di/dt applications. an independent cathode connection for use as "gate return" is provided on pin 2 to minimize the effects of rapidly changing anode-cathode current on the gate control voltage, (v=l*di/dt). it is therefore, critcal that the user utilize the gate return as the point at which the gate driver reference (return) is attached to the vcs device. as with all mos gated devices, proper handling procedures must be observed to prevent electrostatic discharge which may result in permanant damage to the gate of the device advanced pulse power device n- mos vcs, to-247 smct aa65n14a10 pin 1 : gate pin 2 : gate return pin 3 : anode pin 4 : cathode pin 5 : cathode pin 1
|
